Platform 2012: A Many-core programmable accelerator

Overview

An International Initiative Leads to an Innovative Computational Architecture, Platform 2012 (P2012):

  • CMC is collaborating with STMicroelectronics (Canada) on STM’s P2012 initiative which involves researchers around the world and an increasing number in Canada. CMC’s role is to do a mapping of this hardware-software platform into a FPGA-based implementation environment.
  • Platform 2012 aims at moving a significant step forward in accelerator architecture for imaging, video, and next-generation immersive multimodal applications such as computational photography, virtual and augmented reality.
  • P2012 is an area- and power-efficient many-core computing fabric, and it provides an architectural harness that eases integration of hardwired accelerators. The advanced programming models for P2012 are supported with the MIND component-based technology that is used to map the parallel architecture of applications on the platform resources.

The Platform 2012 system is suitable for research in the following areas:

  • High-performance parallel computing with unconventional Network-on-chip multi-core architectures
  • Parallel algorithms for multi-core processors (e.g. imaging, video, and next-generation immersive applications such as computational photography and augmented reality)
  • Task partitioning and mapping algorithms for multi-core processors
  • Thread-level parallelism in streaming applications dataflow models

This platform will be distributed to researchers in Canada through the Embedded Systems Canada project that CMC manages on behalf of 37 institutions located across the country. It will also be available to international collaborators involved in the initiative. Computer simulation capability is available now and FPGA-based capability is expected in early 2012.

P2012 Core Platform 

The Platform 2012 (P2012) is an accelerator system-on-chip targeted to imaging, video, and next-generation immersive applications such as computational photography and augmented reality. The P2012 computing fabric is highly modular, as it is based on multiple clusters implemented with independent power and clock domains.

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The P2012 Software Development Kit (SDK) 

The programming environment relies on the services of the system infrastructure and runtime layer, which supports execution engines, dynamic deployment of the applications, platform quality service, and power management. Finally, the base of the stack consists of the platform modeling layer, including a functional simulator, a transaction-level simulator integrating performance modeling of the architecture platform, and architectural power estimation models. The overall environment is integrated into an Eclipse-based integrated development environment (IDE).

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FPGA-Based Emulation of Platform P2012 (coming soon)

We are currently developing an FPGA-based emulator for Platform P2012 with the following features:

  • Hardware configuration: one cluster with 8 PEs
  • Communication between the x86 host and the computing fabric: PCIe
  • High level parallel programming language: OpenCL 

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Contact Us

Yassine Hariri

Senior Engineer, Platform Design

 

945 Princess Street, Building 50
Innovation Park at Queen's University
Kingston, Ontario Canada
K7L 3N6

Phone: 613.530.4672

Whitepapers and Webinars

Available now for download.