Acceleration Platform


The Acceleration Platform is an FPGA-based development platform targeting research applications running complex computing tasks with an emphasis on FPGA and CPU communication requiring a low-latency and high-bandwidth interface between components (see figure below). Both an Altera and a Xilinx-based board are available and OpenCL support is a feature.


Acceleration Platform Development System Configuration

Key Platform Benefits

  • To provide researchers working with FPGA development access to a hardware acceleration solution for many compute and/or data intensive applications with a low-latency / high bandwidth solution enabling the researchers to remove the bottleneck from the host CPU / memory to the FPGA
  • Enables researchers to focus on algorithm/application acceleration using FPGAs, without detailed knowledge of FPGA hardware design or other infrastructure (e.g., PCIe and memory controller IP blocks)


There are two different types of the FPGA boards—Altera-based and Xilinx-based, with features listed as follows:

Board Type Altera-based
  • Arria 10 1150 GX FPGA with up to 1.5 TFlops
  • Network enabled with 2 QSFP 10/40 GbE Support
  • 8 GB DDR3 on-card memory
  • PCIe Gen3 x8 host interface
  • Active heatsink
  • OpenCL tool flow
  • Low Profile PCIe form factor
  • Kintex® UltraScale™ XCKU115-FLVB2104-2-E FPGA
  • Network enabled with 2 QSFP cages
  • 16GB Memory (4 Banks of 4GB DDR4-2400 SDRAM)
  • PCIe Gen3 x16 host interface
  • Active heatsink
  • Xilinx SDAccel Support
  • Half-length full-height PCIe form factor


Contact Us

About Acceleration Platform:

Development System Coordinator


Owain Jones

Embedded Systems Engineer

Phone: +1.613.530.4784