Acceleration Platform

The Acceleration Platform provides researchers working with FPGA development access to a hardware acceleration solution for many compute and/or data-intensive applications with a low-latency / high-bandwidth solution.


  • Enables the researchers to remove the bottleneck from the host CPU / memory to the FPGA
  • Enables researchers to focus on algorithm/application acceleration using FPGAs, without detailed knowledge of FPGA hardware design or other infrastructure (e.g., PCIe and memory controller IP blocks)



Arria 10 1150 GX FPGA with up to 1.5 TFlopsNetwork enabled with 2 QSFP 10/40 GbE Support8 GB DDR3 on-card memoryPCIe Gen3 x8 host interface Active heatsinkOpenCL tool flowLow Profile PCIe form factor


Kintex® UltraScale™ XCKU115-FLVB2104-2-E FPGANetwork enabled with 2 QSFP cages16GB Memory (4 Banks of 4GB DDR4-2400 SDRAM)PCIe Gen3 x16 host interfaceActive heatsinkXilinx SDAccel SupportHalf-length full-height PCIe form factor

Contact Us

Owain Jones
Manager, CAD Services
Office: 1.613.530.4784
Mobile: 1.613.484.6177
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Open source design platforms for accelerated system development.

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