December 6 to 7, 2018 at Toronto, ON
This two-day workshop brings together experts from Cadence, professors from Canadian universities and representatives from semiconductor companies in Canada, to provide insights into advanced CMOS technologies, specifically FinFETs. Presentations, point-tool demos and panel discussions will provide opportunities to engage with these experts and understand the challenges associated with layout design in advanced CMOS technologies.
- Presentation on FinFET fundamentals, followed by presentations and point-tool demos from Cadence, with a focus on layout tools for FinFETs.
- Expect to hear academic and industry perspectives on current and future CMOS technologies, challenges associated with advanced node FinFETs and future directions for the semiconductor industry. The day will end with a panel discussion on the importance of training HQP for Canadian competitiveness.
- Presentations, point-tool demos and panel discussion provide great opportunities to learn from and engage with experts from both industry and academia.
For more information, see the detailed agenda.