Altera DE4 FPGA Development Board

DE4-530 provides an FPGA-based prototyping platform for system designs that require high-speed connectivity, large design capacity, great memory bandwidth, and programmability with high-performance and low-power consumption. Based around the Terasic DE4-530 FPGA Development Board, it is equipped with industry-standard peripherals, connectors, and interfaces that offer a rich set of features suitable for a wide range of compute-intensive applications.

Link to internal site: LAB Altera DE4 FPGA Development Board


  • Accelerates research by providing a feature-rich platform for implementing and validating embedded system architectures and algorithms
  • Addresses specific research needs through a hardware/software programmable system and application-specific daughter cards (e.g analog interface module)
  • Enables a faster path to commercialization by sourcing commercial-grade components and through compliance with commercial standards and interfaces (e.g., PCI-express, Ethernet)



  • Altera Stratix IV GX FPGA (531,200 LEs, 27,376K bits of total memory, 1,024 18 x 18-bit multipliers, 744 user I/Os, 4 PCI Express hard IP Blocks, 8 PLLs)
  • FPGA Configuration: On-board USB-Blaster, JTAG and Fast Passive Parallel (FPP) configuration
  • Memory: 64 MB Flash with 16-bit data bus, 2 MB ZBT SSRAM, I2C EEPROM
  • Clock system: On-board clock oscillators—50 MHz and 100 MHz, 3 Programmable PLLs configured via FPGA
  • Connectors and Interfaces: 4 Serial ATA ports (2 host and 2 device), 2 HSMC connectors (total 12 high-speed transceivers at 8.5 Gbps, total 38 LVDS pair at 1.6 Gbps, 172-pin), 2 expansion headers (40-pin), PCI Express 2.0 (x 8 lane) connector, 2 DDR2 SO-DIMM socket, SD card socket, 4 Gigabit Ethernet, USB 2.0 high-speed host/device OTG, RS-232 serial port
  • General user I/O: 8 LEDs, 4 push-buttons and 4 slide switches, 8-position DIP switch, 2 seven-segment displays
  • AD/DA module: HSMC connector, two 14-bit A/D converter channel with 150 MSPS, two 14-bit D/A converter channel with 250 MSPS, External Clock In / Out Interface, one Audio CODEC with Line-In, Line-Out, MIC and Headphone
  • Other components: Current sensor for FPGA current measurement, and Temperature sensor

Contact Us

Olive Zhao
Technical Staff, Embedded Systems Design
Office: 1.613.530.4696
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