Fabrication FAQ

Answers to researchers' most frequently asked questions about our multi-project wafer services.

What Fabrication Services Does CMC Offer?

CMC Microsystems supports fabrication access, through a competition process, to a variety of technologies for digital, analog, RF, mixed-signal, MEMS, microfluidic and photonic/optoelectronic designs. For complete listing of technologies, please see Fabrication Technologies.

Faculties and students at Canadian universities who hold an account with CMC Microsystems are invited to submit an application.  For some technologies, you or your university may be required to sign additional agreements, please check under the licensing tab for restrictions for chosen technology.

You do not require a Subscription to apply for subsidized Fabrication Access through a CMC Resource Competition but you will require a Prototyping Level Subscription to take advantage of any award.

 

What Are The Costs To The Researcher?

Two costing scenarios exist for Researchers in a Canadian University:

  1. Researcher can obtain device fabrication at a subsidized cost (generally 20% of market cost) by applying through a CMC Resource Competition.  Applications will be Peer-Reviewed.
  2. Fabrication area can be purchased at the Canadian Academic Price.  This option allows the researcher to bypass the resource application process.

Requests will be entertained from Non-Canadian Researchers and/or Commercial Enterprises and costing will be on a case by case basis.  Please contact fab@cmc.ca for additional information.

Additional information on pricing 

When Will A Fabrication Run Take Place?

Review the online Fabrication Schedule

What Is The Resource Competition Process For Subsidzed Fabrication Access?

Competition announcements are included in CMC’s monthly news bulletins and posted on CMC’s Website (Resource Competitions)

All requests are reviewed by an external Peer-Review Committee, including Industry and Academic Reviewers drawn from across the country and with expertise in the specific technology areas being targeted.  The Review committee will recommend allocation of fabrication resources based on the information included in the application: "Request for Manufacturing Resources Form" (RFMR), rated against CMC’s Effectiveness Criteria.  Note:  Successful applications generally contain detailed performance specifications and substantive information on collaborations and economic and social benefits to Canada.  For an example of a successful application, please see: (provide example application).

Applications that have been awarded resources will be fabricated in limited quantities, assuming standard processing is requested.  Packaged parts, special processing option and special requests are available and may be subject to additional costs.  Please identify these requirements on your RFMR form. 

Researchers will be notified of awards within three (3) weeks of the Competition Application Deadline.

How Does a Researcher Select A Design Name?

The format of a chip name for ITTUUXXX is: 

  • I indicates that the chip is intended for Implementation (fabrication),
  • TT is a two-letter code representing the process technology,
  • UU is the two-letter code for your university and
  • XXX is a user-chosen three-letter identifier that must be unique within your university.

An example is ICFWTABC, a CMOSP18 chip from University of Waterloo with given name ABC. A table of two-letter university codes can be found here . Two-letter codes for the process technologies are included here.

 

How Does a Researcher Apply For Resource Competition?

Once you have selected your run from our Fabrication Schedule, click on the Application Date and select Apply Now.

 

How Does a Researcher Accept an Award?

Upon receipt of Award, ensure valid Prototyping Subscription in place, this must be in place prior to submitting your final design for implementation.  Detailed information on how to  submit your design will be provided with your award. Faculty must accept the award and associated costs.  

 

What is a Design Plan?

Plan for Design Verification and Review

 

How Does a Researcher Submit a Design?

Up to Design Deadline, use the CMC Microsystems DRC

  • You must use secure FTP to submit for DRC using the following steps:
    • Export your design from your CAD tool is GDSII (stream) format.  For the stream, choose a design name (as shown above) of the form DTTUUXXX where D indicates the design file is intended for DRC, TT is the technology code, UU is your university code and XXX is a name you choose for your design.  Please also make the top-level cell name the same as the design name.
    • Optionally compress the file using the Unix compress(1) utility.  The Unix command to type in this example is compress DTTUUXXX.  This will create the file DTTUUXXX.Z.  Alternatively, the file can be gzipped using the freeware gzip utility.  The command to do this would be gzip DTTUUXXX, and would result in a file called DDTTUUXXX.gz.
    • Secure FTP the design file to CMC Microsystems using the Unix command (or use DOS command in Windows environment):
      • sftp -o user=<your email address> cmc-fab-01.cmc.ca
      • For username and password, use the account that CMC Microsystems gave you when you registered with CMC.
    • Change to the "fab" directory using the command cd fab.  This will place you into a write-only directory. (you cannot "ls" or "get" a file).
    • Deposit the stream file with the command (in this example) put DTTUUXXX.Z (or DTTUUXXX.gds if you did not compress file).   NOTE:  if you have recently deposited a file by the same name, the ftp may fail with the error message "permission denied".  This is because the design file is still queued for DRC and has not yet been removed from the directly.  You can try to delete it with the command del DTTUUXXX.Z (or DTTUUXXX.gds) or submit a file with a different name.  A suffix can be added to the file name to make it different.  In this case, the file name could be changed to DTTUUXXX_1.Z (or DTTUUXXX_1.gds).
    • Enter quit to log out and exit the FTP utility.
    • After the design file has been successfully deposited on CMC Microsystems' FTP server, send an e-mail message to fab@cmc.ca with the name of the file (DTTUUXXX.Z or DTTUUXXX.gds) in the subject field or body to notify use that the file has been deposited and to indicate who is using the DRC service and who to contact if necessary.
    • View DRC results on the Web.  Must hold a valid Designer or Prototyping Subscription to view results.  CMC Microsystems' DRC and Implementation service automatically DRCs each design we receive and posts the results to a Web page.  Instructions on how to retrieve your results can be found here.  Make sure you view any log files to do with phantom library/black box substitutions to ensure that your design has been handled correctly.
    • If you do not see DRC results within several hours, send a message to fab@cmc.ca.
  •  DRC service is available at no cost to students and researchers holding a valid Designer or Prototyping Subscription, working on non-commercial designs for research or educational purposes.
  • During chip design, the CMC Microsystems DRC service should be used for information on DRC violations, data compatibility with CMC Microsystems CAD systems and confirmation that large design files can be submitted error-free over the network.

Submit a Request for Implementation (RFI) and Final Design Data to CMC

  • Request For Implementation form (RFI) is due to CMC Microsystems by the submission deadline date and time. The RFI is mandatory, whether or not you have previously submitted an RFMR.
  • The RFI includes designer names and packaging information, and lists any intentionally violated design rules, it's an essential document that CMC Microsystems uses to qualify designs for fabrication and to contact designers when necessary.
  • Once logged into CMC website, please:
    • Go to: https://competitions.cmc.ca/CMC/HomePage.aspx
    • Select "Fab Applications" Tab
    • Click on "Edit RFI" Link associated with your design
      • Please note, if the supervising faculty has not accepted the award/associated costs, the RFI link will not be enabled.
  • Final design data in GDSII format must arrive in full via FTP at CMC Microsystems on or before 2:00 PM (Eastern Time) on the designated submission deadline day. All late designs will be treated as low priority and may not be fabricated. The reason is that CMC Microsystems has scheduled time windows for mask making and wafer fabrication at the manufacturer and missing them can delay the entire run.
  • Submit your final design using the following instructions:
    • Please follow same instructions provided for DRC using ITTUUXXX, whereas "I" indicates design is being submitted for Implementation.  All other procedures remain the same.  For designs to be accepted for fabrication, a valid Prototyping Subscription must be in place, allocation accepted by faculty, no outstanding test reports and design does not exceed allocated dimensions.
  • If you submit your design more than once, CMC Microsystems will assume that the most recent design received is the version for fabrication.

 

How are Fabricated Devices Delivered?

Monitor Fabrication Schedule for Chip Shipping Forecast Dates, Prepare for Testing

 

When Does a Researcher Submit a Test Report? 

Submit a Test Report to CMC (within 3 months of delivery date)

  • All designers who send their designs to CMC Microsystems for fabrication must submit a Test Report within 90 days after they receive their chips.
  • To submit a test report please:
    • Sign in to your account at www.cmc.ca
    • Go to https://competitions.cmc.ca/CMC/
    • Select "Test Report" tab
    • Select the design name for the report you are completing
    • To submit at a later date, select "Request an Extension"