LAB

Development of Redistribution Layers on Silicon Interposers

This is a call for Expressions of Interest (EOIs) for collaborators to participate in designing and validating a platform technology that will, upon completion, be offered to Canada’s National Design Network (CNDN). To be considered, projects must align with the information in this document. Enquiries and EOIs should be submitted to RDL2020@cmc.ca. The application deadline is May 25, 2020.

CMC Microsystems and partners are developing a multi-user silicon interposer platform (see figure below) and are looking for collaborators who can (1) develop and fabricate redistribution layers (RDL) on processed silicon wafers and/or (2) assemble chips on interposers. Identification of, and collaboration with a fabrication facility or partner that will provide services post project completion is required. The purpose of this project is to develop capability and broaden options for manufacturing R&D prototypes.  The purchase of additional fabrication runs is anticipated (and will be subject to usual public sector competitive procurement).

Respondent teams that combine microfabrication capabilities with an accompanying research application for the interposer platform are strongly preferred.

Candidate microfabrication facilities should have the following capabilities:

  • Wafer sizes: pieces up to 150 mm
  • Lithography: 5 µm lines, 5 µm spacing. Maskless lithography is a plus.
  • Material processes: Al, AlNi, Cu, Au, Ag, silicides, high-performance variants, etc. for interconnect; SiO, SiN, low-k variants, etc. for dielectrics; bond pads; inter-metal vias; planarization for two or more RDLs.
  • Laser dicing is a plus.

Candidate assembly facilities should have the following capabilities:

  • Automated wire bonding Al or Au
  • Solder BGA
  • Flip-chip assembly

Example research applications (although other topics are welcome):

  • Chiplet integration for prototyping system-on-chip circuits
  • 2D multi-technology integration for compact sensor nodes
  • Reports on the microfabrication and/or assembly process development
  • Identification of a facility or partner willing to deliver the developed recipe as a service, and is willing to participate in competitive procurement process post project completion
  • Functional prototypes for applications testing by collaborators
  • Documentation of the final and optimized process flow in XperiDesk
  • (If applicable) Demonstration data of the platform for a unique application
  • Publication of final results

For the scope of this work, CMC will provide the following:

  • User training and access to CAD tools and design kits
  • Silicon wafers pre-processed with through-silicon vias (TSVs)
  • Design requirements for RDL fabrication
  • Funding for academics: up to $50,000* per year for 3 years

      * Amount depends on respondent’s contribution and agreed deliverables.

Eligibility

  • Principal Applicants may participate in only one EOI. Preference will be given to holders of a Subscription.
  • Collaborators must be from a Canadian post-secondary institution, government laboratory, or a company with operations in Canada.
  • Timelines and availability of resources may be determining factors for project acceptance.

Application Process and Additional Instructions

  1. Prepare a brief EOI (maximum 500 words) addressing the following topics:
    • Identification of the Principal Applicant and team members, including the primary fabrication laboratory
    • Overview of the process development and demonstration objectives
    • The team’s technical expertise and equipment capabilities relevant to the proposed delivery (process simulation and engineering, microfabrication, etc.)
    • (If applicable) Proposed research application for the technology, research team, and a brief research plan
    • Willingness, capacity, and track record of the applicant team for future delivery of the process in R&D volumes as an “on-demand” service to the research community
  2. Submit the EOI to RDL2020@cmc.ca before the application deadline.
  3. EOIs will be screened by CMC for alignment with the Objective, potential benefits to Canada’s National Design Network (CNDN), applicant eligibility, and resource availability.
  4. There will be a response to a submitted EOI within approximately one week of the submission deadline. The response will indicate whether the project has been selected for further consideration.
  5. Following a favourable response, the Principal Applicant will work with a designated CMC Technical Project Manager to develop a detailed project proposal.

A.1 Eligible Expenses

  • CMC funds are allocated to prototype development, including operator and equipment time, simulation/fabrication/testing costs, materials and supplies.
  • The CMC investment will be managed by a CMC employee who is an integral part of the project team.

A.2 Intellectual Property

Researchers and their collaborators involved in R&D projects use background intellectual property (IP), create foreground IP, and generate new knowledge. CMC approaches these projects expecting that, whenever possible, the IP will subsequently result in a benefit to Canada preferably including economic value creation.

  • Clients will own their IP developments arising from the project.
  • CMC will own its IP developments arising from the project.
  • The parties will jointly own jointly developed IP arising from the project.
  • CMC will provide rights to IP developed by CMC, including its interest in jointly developed IP, at no cost to others involved in the project who are proceeding with commercial development.
  • Clients will provide to CMC, at no cost, rights for non-commercial use of their IP arising from the project (including their interest in jointly developed IP).
  • Clients will provide to CMC, at no cost, rights for commercial use of their IP arising from the project (including their interest in jointly developed IP) if they do not plan to develop it.
  • Not all projects are expected to yield valuable IP. Some projects may require a separate agreement.
Scroll to Top
Skip to content