CAD

This document is a companion document to existing SDAccel documentation that is published by Xilinx https://www.xilinx.com/products/design-tools/software-zone/sdaccel.html. The document provides information on running the SDAccel development tools in CMC cloud where you can utilize the private cloud framework for all design, emulation, and compile tasks.

Even if you are familiar with using the SDAccel tools, read the Getting Started section below for how to get the tools running in CMC cloud and review the accompanying Xilinx tutorial as the SDx releases introduce many improvements to the SDAccel GUI flow.

Getting Started

1. Ensure that your research team has access to the Xilinx SDAccel license pass.
2. Create an instance of SDAccel Development Environment (Virtual) on CMC cloud.
   If you are unfamiliar with using CMC cloud, see Quick Start Guide: Using CMC cloud design environments.
3. From the terminal in your CMC cloud instance, set up the license and environment settings by sourcing the SDAccel setup script:

[vowain@vm]$ source /CMC/Xilinx/sdaccel.2018.3.csh

4. Run the SDx GUI:

[vowain@vm]$ sdx

5. When SDx starts up, you are prompted for where you want your SDx workspace to be. The default workspace is in your home directory, but to take advantage of your persistent storage in CMC cloud, select a folder in your mydata directory, as shown in Figure 1.

Figure 1: SDx Workspace Launcher

Working with the Xilinx SDAccel Environment Tutorial

This section was authored using the content from the SDAccel Tutorials and SDAccel Examples published by Xilinx in GitHub.

1. In the window Welcome, click Create Application Project and name your project vadd, and then click Next.

Figure 2: SDx Create Application Project

2. If you are following this tutorial only to learn SDAccel, select the default platform (xilinx_u200_xdma_201830_1), and then click Next >.
   Note: If you are targeting a specific FPGA for your development, ensure that you select the appropriate platform when creating your project definition. If you do not see the FPGA board that you want to target, contact CMC Support.

Figure 3: SDx Platform Selection

The window Templates is displayed with the options for Empty Application and Vector Addition, as shown in Figure 4.

Figure 4: SDx Templates Dialogue

3. This tutorial uses the files from the GitHub examples. To get these files, click the button SDx Examples, as shown in Figure 4.
4. In the window SDx Examples, click Download.
   A long list is displayed,  as shown in Figure 5.

Figure 5: SDx Examples

5. To close the window, click OK.
   A long list of templates is displayed in the windows Templates.
6. In the text box Find, enter “vector”, and then select Getting Started Examples -> Miscellaneous Examples -> Vector Addition.
   NOTE: Do not select Vector Addition located at the bottom of the list that comes pre-installed with SDx, as shown in Figure 6.

Figure 6: SDx Templates Populated with Downloaded Examples

7. Click Finish.
   Your application is now set up. By default, the Active Build Configuration is set to Emulation-SW.
8. To build the application and run the software emulation, click Run.
   After finishing the build and run, the output of the application and the words TEST PASSED appears in the window Console, as shown in Figure 7.

Figure 7: SDx Vector Addition Project

9. To compile the binary that could execute on a physical FPGA board, change the Active build configuration to System, and then click Run.
   This build will take up to several hours and because the CMC cloud image does not have a physical FPGA attached, after completion you will see ERROR: no devices found as shown in Figure 8.

Figure 8: SDx Application System Build Configuration

10. Even though the compiled binary cannot execute in this image, you can transfer the binary to a machine with an FPGA board that matches your platform selection and execute it. Follow these steps to find the compiled binary in the file system:
    1. Change directory into your SDx workspace that you defined in Getting Started step 5, and then into the folder vadd/System.
    2. To review the folder contents, run the command  ls.
    3. Transfer the files to your local system using SSH:

[vowain@razr-vm0-128 ~]$ cd ~/mydata/2018.3workspace/vadd/System/
[vowain@razr-vm0-128 System]$ ls -lh
total 39M
-rw-r--r--. 1 vowain vcl 1.7K Feb  1 10:41 guidance.html
-rw-r--r--. 1 vowain vcl  207 Feb  1 10:41 guidance.pb
drwxr-xr-x. 7 vowain vcl 4.0K Feb  1 13:23 krnl_vadd
-rw-r--r--. 1 vowain vcl 2.2K Feb  1 13:23 krnl_vadd.ltx
-rw-r--r--. 1 vowain vcl  14K Feb  1 13:23 krnl_vadd.mdb
-rw-r--r--. 1 vowain vcl  38M Feb  1 13:23 krnl_vadd.xclbin
-rw-r--r--. 1 vowain vcl 5.1K Feb  1 13:23 krnl_vadd.xclbin.info
-rw-r--r--. 1 vowain vcl  357 Feb  1 10:42 krnl_vadd.xclbin.sh
drwxr-xr-x. 3 vowain vcl 4.0K Feb  1 13:23 libs
-rw-r--r--. 1 vowain vcl 4.3K Feb  1 10:41 makefile
-rw-r--r--. 1 vowain vcl   64 Feb  1 13:23 sdaccel.ini
drwxr-xr-x. 2 vowain vcl 4.0K Feb  1 13:23 src
drwxr-xr-x. 2 vowain vcl 4.0K Feb  1 13:24 vadd-Default
-rw-r--r--. 1 vowain vcl  120 Feb  1 13:23 vadd-Default.launch.log
-rw-r--r--. 1 vowain vcl   30 Feb  1 13:23 vadd-Default.launch.ui.log
-rwxr-xr-x. 1 vowain vcl  42K Feb  1 13:23 vadd.exe
-rw-r--r--. 1 vowain vcl  17K Feb  1 13:23 vadd_System.build.log
-rw-r--r--. 1 vowain vcl 2.3K Feb  1 13:23 vadd_System.build.ui.log

Executing Your Kernels on a Physical FPGA Board

The steps above can create the files that you need to execute on a physical FPGA board. For the actual execution, you must review the requirements for your environment and FPGA platform in the SDAccel online documentation.