FAB

TSMC 0.35 µm CMOS Process Technology

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Description

This 0.35 μm CMOS technology is available through CMC’s multi-project wafer service, which delivers Taiwan Semiconductor Manufacturing Company (TSMC) nanometer and micron-scale CMOS technologies.

Applications

The 0.35 µm CMOS (CMC term is CMOSP35) process is suitable for:

  • Analog circuits
  • RF circuits
  • Mixed-signal circuits

Process Details

  • Electrical Contact Forming Technology: Polycide
  • Layers: 4 metal, 2 poly
  • Supply Voltages: 3.3 V
  • Minimum Drawn Gate Length: 0.35 μm

Note: The expected number of chips to be delivered for this technology is 40.

Features

  • 3.3 V/5 V
  • 2P4M

Design Kits and Libraries

Pricing

List Price
Price for Subscribers

$700
(Minimum charge is for a 25 mm2 design)

Note: List pricing does not include Engineering Support – contact fab@cmc.ca for a quote.

Note: Discounted pricing is available to academics in Canada with a CMC Subscription. You must sign in to see it.

Licensing

Minimum Subscription Required: Research

Does your research benefit from products and services provided by CMC Microsystems?

The CMC SponsorChip program helps companies enhance their research efforts and links to academic researchers.

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