TSMC 0.35 µm CMOS Process Technology


This 0.35-micron CMOS technology is available through CMC’s multi-project wafer service, which delivers Taiwan Semiconductor Manufacturing Company (TSMC) nanometer and micron-scale CMOS technologies. 

The 0.35µm CMOS (CMC term is CMOSP35) process is suitable for:

  • Analog circuits
  • RF circuits
  • Mixed-signal circuits

Process Details:

  • Electrical Contact Forming Technology:
    • Polycide
  • Layers:
    • 4 metal, 2 poly
  • Supply Voltages:
    • 3.3 V
  • Minimum Drawn Gate Length:
    • 0.35 μm
Note: The expected number of chips to be delivered for this technology is 40.


  • 3.3/5V
  • 2P4M


(Minimum charge is for a 1.1 x 1.1 mm2 design)

(Minimum charge is for a 1.1 x 1.1 mm2 design)

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