FAB
TSMC 0.35 µm CMOS Process Technology
Description
This 0.35 μm CMOS technology is available through CMC’s multi-project wafer service, which delivers Taiwan Semiconductor Manufacturing Company (TSMC) nanometer and micron-scale CMOS technologies.
Process Details
- Electrical Contact Forming Technology: Polycide
- Layers: 4 metal, 2 poly
- Supply Voltages: 3.3 V
- Minimum Drawn Gate Length: 0.35 μm
Note: The expected number of chips to be delivered for this technology is 40.
Features
- 3.3 V/5 V
- 2P4M
Applications
The 0.35 µm CMOS (CMC term is CMOSP35) process is suitable for:
- Analog circuits
- RF circuits
- Mixed-signal circuits
Pricing
Subscribers (Academics in Canada)
$1,400/mm2
(Minimum charge is for a 12 mm2 design)
Subscribers (Academics in Canada, Peer Reviewed)
$250/mm2
$100/mm2
(Minimum charge is for a 12 mm2 design)
Academics outside of Canada or Industry
Contact fab@cmc.ca for MPW access, or sales@cmc.ca for a dedicated run.
Licensing
Minimum Subscription Required: Research
To Apply
Does your research benefit from products and services provided by CMC Microsystems?
