Modern applications include a variety of heterogeneous circuit blocks. Diverse technologies, substrate and interconnect materials, and processes are required to coexist within a single system. In addition to heterogeneity, ultra‑large scale integration is necessary for a variety of applications, e.g., neuromorphic systems. Silicon interconnect fabric (Si-IF), a wafer scale heterogeneous integration platform, is expected to promote a paradigm shift in the hierarchy of systems integration. The Si-IF platform replaces traditional packaging components, i.e., interposers, packages, and printed circuit boards (PCBs). Bare heterogeneous dies are directly attached to a Si wafer at extremely fine vertical interconnect pitch of 2 to 10 μm and at high proximity of less than 100 μm. The integration is based on thermal compression bonding and therefore solderless. The Si‑IF supports integration of a system-on-wafer (SoW) that exhibits the superior performance of a system-on-chip (SoC), in other words, an SoC-like SoW.
In this webinar, we will describe the Si-IF platform and integration methodology. We will also talk about recent efforts to make the technology available for prototyping and the establishment of the Si-IF technology within a Canadian-based fabrication facility. Eventually, the technology is expected to be accessible through CMC.