The Xilinx ISE Design Suite is an essential part of several CMC-supported FPGA-based Development System environments and is provided at no cost to Designer and Prototyping Subscribers to enable effective use of these systems, including:
- ISE Design Suite
- Vivado HLS tool for C, C++ and SystemC design and automated implementation on Xilinx FPGAs
- Vivado Design Suite of tools: With enhanced features for Xilinx 7 Series FPGAs (Virtex-7, Artix-7 and Kintex-7). Currently, Zynq devices are not supported with Vivado.
- Partial Reconfiguration: Allows designers to change FPGA functionality on the fly (compatible with ISE 14.5 or later, or Vivado 2013.3 or later).
Join the NDN Development Systems Community to learn more and interact with other researchers using these environments.
Technical Details
| Software | ISE | Vivado |
|---|---|---|
| Software Version | 14.7 | 2019.1 |
| Operating System | Windows 7 and 10, Linux | |
| Bit Level | 64-bit | 32- and 64-bit |
What You Get
- Unlimited use instances per tool for the subscriber’s research team, to access a shared license pool (up to the limits of the available licenses in the shared pool)
- Access for one year
Licensing Requirements or Restrictions
Use of this software is restricted by legal agreements requiring signature at the university level:
- Individuals accessing this software must only do so from within the geographic boundaries of Canada.
- The use of this software is restricted to university academic research and teaching only.
- The software may NOT be used for commercial purposes.
- Only professors and their research teams with a Research subscription in good standing are authorized to access this software.
- The use of this design tool is subject to the software licensor’s usage terms and conditions set out in the Xilinx Inc. End User License Agreement.
- Use is subject to Export Control regulations as outlined in Section 14(b) of the Xilinx Inc. End User License Agreement.
For more information, contact the Licensing Administrator at cad@cmc.ca.
