The SDAccel™ development environment for OpenCL™, C, and C++, enables up to 25X better performance/watt for data center application acceleration leveraging FPGAs. SDAccel, member of the SDx™ family, combines the industry’s first architecturally optimizing compiler supporting any combination of OpenCL, C, and C++ kernels, along with libraries, development boards and the first complete CPU/GPU like development and run-time experience for FPGAs.
First Architecturally Optimizing Compiler for OpenCL, C, and C++
- Architecturally optimizing compiler delivers up to 25X better performance/watt compared to CPU/GPU
- Delivers 3X the performance and resource efficiency of other FPGA solutions
- Enables new or existing OpenCL, C and C++ code for creating high performance accelerators
First Complete CPU/GPU-Like Development Experience on FPGAs
- First complete software development environment targeting FPGAs
- Optimize applications on FPGA platforms with little to no FPGA experience
- Easily migrate applications to FPGAs while maintaining and reusing OpenCL, C and C++ code
First complete CPU/GPU-Like Run-time Experience on FPGAs
- Supports large applications with multiple programs and CPU/GPU-like on-demand loadable compute units
- Maintains system functionality during program transitions and keeps critical system interfaces and functions live during application execution
The SDAccel development environment allows FPGA accelerators to be shared across multiple applications using on-the-fly compute unit reconfiguration.