Cadence Multichip Design Platform – Chiplet-Based RF System Design

26jan2:00 pm3:00 pmCadence Multichip Design Platform – Chiplet-Based RF System DesignCMC-Hosted Webinar

Event Details

Heterogenous integration of disparate technologies has become an increasingly compelling way to solve the needs of SoC complexity while still using the best of breed for each function of a system. In our presentation, we will show how the Virtuoso Design Platform (an integrated combination Allegro, Virtuoso RF, Spectre, Clarity 3DEM, EMX and Celsius Thermal) allows for the design, extraction, simulation and thermal analysis of a chiplet-based laminate package design, while remaining in a unified design environment.

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Presenter: Paul Mosinskis

Bio: Paul Mosinskis is a Cadence Solutions Architect, supporting custom flows for Mil/Aero customers. Prior to designing these flows, he supported Cadence’s Liberate characterization tools, specializing in the development and deployment of Liberate AMS. He has 20 years of mixed signal design experience in RF, data conversion, SERDES and photonics and holds 15 patents in these areas. He is based in Pennsylvania and has been with Cadence for 7 years.

Time

January 26, 2023 2:00 pm - 3:00 pm(GMT-04:00)

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