Packaging & Assembly Services
Explore CMC Microsystems® packaging services, backed by engineering support and consultation, providing researchers with physical components for testing and building prototypes. This includes:
- Standard component wire bond packaging
- Single or multi-die assembly, including flip-chip service
- Custom packaging & assembly services on a case-by-case basis
- Expert engineering support and consultation
Categories and Pricing
Access to Standard Component Wire-Bond Packaging
- Standard packages may be ordered through CMC’s fabrication services. If you are a subscriber and have your designs fabricated through CMC, parts will be packaged at cost. Contact CMC firstname.lastname@example.org for details.
- Package types can be selected from CMC’s standard package as listed in the table below.
- Pricing is highly competitive: for instance, we can help you access standard packaging at prices ranging between $800 to $1500 for a batch of five to ten packaged chips.
Note: All of the above services are also accessible to non-subscribers. Contact CMC email@example.com for a quotation.
|Package Type||Pin Type||Cavity Size (mm)|
|DIP 40||Through-hole pin||8.64 x 8.64|
|CFP 24||Surface-mount, gull-wing leads||3.5 x 5.5|
|CQFP 44||Surface-mount, gull-wing leads||5.6 x 5.6|
|CQFP 80||Surface-mount, gull-wing leads||7.62 x 7.62|
|CQFP 120||Surface-mount, gull-wing leads||11.68 x 11.68|
|CPGA 69||Through-hole pin||8.89 x 8.89 OR|
11.94 x 11.94
|CPGA 85||Through-hole pin||8.89 x 8.89 OR|
11.94 x 11.94
|CPGA 144||Through-hole pin||11.99 x 11.99|
|CPGA 208||Through-hole pin||8.76 x 8.76|
|CPGA 209||Through-hole pin||13.99 x 13.99|
|CPGA 209 (for designs shipped after June 2019)||Through-hole Pin||13.99 x 13.99|
Access to Single or Multi-Die Packaging and Assembly Services
Subscribers can access services under this category on a cost-recovery basis. The services are clearly defined with known options and boundaries. Click on the respective links on the list below for details.
|Generic AIN Carriers||For photonic chip-on-carrier applications, optimized for semiconductor laser testing and optical waveguide device testing, compatible with the 14-pin butterfly package.|
|Die bumping and flip-chip||Solder or gold stud bumps on loose dies. Flip-chip attachment for reduced package footprint, improved electrical/thermal performance, and multi-technology integration. Chip-to-board flip chipping is available at 3IT at the Université de Sherbrooke. For more info, consult the design guide.|
|Laser-assisted cleaving||For siphotonics and silicon-based chips. SOI substrates, thin top silicon layer, facet coupling, with cleaving along vertical plane of the waveguide and singulation of specific area of a chip.|
Cost-Recovery Access to Custom Packaging and Assembly Services
Subscribers can access services under this category at cost-recovery prices by submitting an application here. Services under this category are of more exploratory nature and boundaries are highly flexible. Request for service is treated on a case-by-case basis.
|Hermetic or Vacuum packaging||Sealed atmosphere within a ceramic or metal package|
|Photonic packaging in a 14-pin butterfly package||Photonic component packaging with DC/RF connection, high-precision fibre coupling, thermal monitoring, and thermoelectric cooling|
|Complete/selective bond wire encapsulation||Custom wire bonding for single or multi-die applications. Complete or donut-shaped glob top to protect bond wires and the die from mechanical and environmental influences or to provide controlled environmental access to the die|
|Die-on-board||Direct connections of bare dies to a substrate can be made through wire bonding|
|Die stacking||Multiple dies can be stacked using combination of wire bond and flip-chip.|