CAD

Design Methodologies

The methodology deliverables may contain instructional materials such as:

  • Design Flows—Step by step instructions guiding users through the CMC design environment on knowing “what to do”
  • Design checklists—a list of items to consider in your design to ensure successful implementation
  • Design tutorials—instructional material to go through the design flows. It may also include sample design files and libraries.
The design methodologies provided by CMC Microsystems help guide users through the design process to ensure successful “designs”.
NameSummary
Design Kit: Cadence Analog/Mixed Signal Design Methodology and Training KitThe Cadence Analog/Mixed Signal Design Methodology and Training Kit is a package containing a number of elements covering the design concepts for analog and digital block authoring, and overall mixed signal design, based on the Cadence design environment.
Reference Design and Design Methodology: Design of Silicon Interposers Using Standard CMOS TechnologiesDesign of Silicon Interposers using Standard CMOS Technologies – Reference Design and Methodology Flow
Design Methodology: STMicroelectronics 28nm FD-SOI CMOS Technology Digital/Mixed-Mode Design FlowThis document outlines the Digital/Mixed Mode design flow for STMicroelectronics’ 28nm FD-SOI CMOS technology.
Design Methodology: ST 28 nm FD-SOI CMOS Technology – Analog Design Flow and Reference DesignST 28nm FD SOI – Analog/RF Design Flow and User Guide
Advanced CMOS ESD IO Design: Application Note, Design Guidelines, and ST 28nm CMOS Bulk LP IO LibraryAdvanced CMOS ESD IO design package, including a document with design guidelines, and ST 28nm CMOS Bulk LP IO Library.
Design Methodology Kit: Cadence Analog/Mixed Signal (AMS) Design FlowsAn Analog/Mixed Signal Design Methodology Kit and tutorial to learn A/MS design techniques and the Cadence design environment
Design Flow Tutorial: Analog IC DesignThe purpose of this tutorial is to introduce designers to the analog IC design flow supported by CMC, and to the syntax used by the Matlab and Cadence tools.
Design Flow: Analog ICDocumentation for CMC-supported analog design flow.
Design Methodology: Digital Design Flow DescriptionDescribes components of the digital design flow, from high level system design to tape-out.
Design Methodology: Digital Design Flow ChecklistThis checklist presents a sequence of design gates (assessment steps) and their associated rules and guidelines.
Design Methodology: Digital Design Flow DiagramDiagram of the CMC Digital Design Flow V2.0
Design Methodology Kit: ST 28nm CMOS Analog/Digital Design FlowA complete analog and digital design flow tutorial based on ST Microelectronics 28nm CMOS design kit with Cadence Encounter and Synopsys Design Vision setup files and a sample analog and digital IO pad library
Tutorial Guide: Using Siemens Tessent Tool for Scan-Based DFT Flow (ICI-331)This tutorial guide describes how to use the Tessent tool suite to create a scan-based DFT design for CMOSP13 technology.
Design Methodology: Cadence RF SiPThe Cadence RF SiP Methodology Kit provides a complete SiP (system-in-package) development platform for adopting and implementing advanced package design techniques for mixed-signal SiPs.
Design Methodology: RF Design Flow DocumentationDocumentation for the CMC-supported RF design flow
Conference Presentation: DFT Methodology for 3D Stacked MicrochipsThis document contains slide material from a recent CMC presentation at the VLSI Test 2012 Symposium, entitled: Design-for-Test (DFT) Methodology for 3D Stacked Mixed-Signal Integrated Circuit
Design Flow Example for DFTAdvisor and FastScanScan-chain Insertion and Automatic Test Pattern Generation (ATPG) Flow Diagram.
Design Flow Example for MBISTArchitectMemory BIST Insertion and Simulation Flow Diagram.
Design Flow Example for BSDArchitectBoundary Scan Insertion and Simulation Flow Diagram.
NameSummary
MEMS Pro Training MaterialsStep-by-step training manual for MEMS Pro version 8.0 and 8.2, detailing basic use, and two design example (Tunable Filter and RF Switch)

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