FAB

Available Technologies

Through supplier partnerships, we offer multi-project wafer services and related fabrication services in a variety of technologies. View our fabrication schedule online.

Process NameFeaturesDesign KitCanadian AcademicCanadian Academic Peer ReviewedList

STM 28 nm CMOS FDSOI

ST Microelectronics logo

Product Page

  • 1.0/1.8V
  • 1P8M
  • no mimcap
  • LVT

$12,500/mm2
(Minimum charge is for a 1.25 mm2 design)

$5,000/mm2
(Minimum charge is for a 1.25 mm2 design)

TSMC 65 nm CMOS GP

Product Page

  • 1.0/2.5V
  • 1P9M
  • mim/momcap
  • LVT/native/HVT

$5,200/mm2
(Minimum charge is for a 1.1 x 1.1 mm2 design)

$2,350/mm2
(Minimum charge is for a 1.1 x 1.1 mm2 design.)

TSMC 65 nm CMOS LP

Product Page

  • 1.2/2.5V
  • 1P9M
  • mim/momcap
  • LVT/native/HVT

$5,200/mm2
(Minimum charge is for a 1.1 x 1.1 mm2 design)

$2,350/mm2
(Minimum charge is for a 1.1 x 1.1 mm2 design)

TSMC 0.13 μm CMOS

Product Page

  • 1.2/3.3V
  • 1P8M
  • mimcap

Design Kit: TSMC 0.13 µm CMOS

$2,050/mm2
(Minimum charge is for a 1.1 x 1.1 mm2 design)

$1,025/mm2
(Minimum charge is for a 1.1 x 1.1 mm2 design)

TSMC 0.18 μm CMOS


Product Page

  • 1.8/3.3V
  • 1P6M
  • mimcap
  • LVT/native/HVT

$1,100/mm2
(Minimum charge is for a 1.1 x 1.1 mm2 design)

$425/mm2
(Minimum charge is for a 1.1 x 1.1 mm2 design)

TSMC 0.35 μm CMOS

Product Page

  • 3.3/5V
  • 2P4M

$475/mm2
(Minimum charge is for a 1.1 x 1.1 mm2 design)

$250/mm2
(Minimum charge is for a 1.1 x 1.1 mm2 design)

AMS 0.35 μm CMOS – Basic

Product Page

  • 3.3/5V
  • 2P4M

$1,200/mm2

$600/mm2

AMS 0.35 μm CMOS – Opto

Product Page

  • 3.3/5V
  • 2P4M
  • anti-reflective coating

$1,200/mm2

$600/mm2

AMS 0.35 μm CMOS – High Voltage

Product Page

  • 3.3/5/50V
  • 2P4MH35B4D3kit includes:
    • standard cell
    • IO
    • bondpad

 

$1,320/mm2

$600/mm2

Open-Gate Silicon JFET

Product Page

  • JFET with no top gate, enabling user-deposition of sensor material
  • 4-mask process on epitaxial Si with 5 µm feature size
  • Front- and back-side Boron ion implantation
  • One metal routing layer
  • Gold pad metallization (compatible with wirebonding)
  • SiN passivation
  • Aluminum bottom gate

Design Kit: Open-Gate Silicon JFET (OG Si-JFET) in L-Edit and Synopsys Sentaurus

Contact fab@cmc.ca.

Silicon Photonics General-Purpose

Product Page

  • SOI, 220 nm top Si, 2000 nm BOX
  • 193 nm lithography for waveguides
  • 6 implants for optical modulators
  • Ge deposition & implanting for photodetectors
  • Two metal levels for routing plus metal heater

$14,000
(Per 3 x 8 mm2 design)

$4,300
(Per 3 x 8 mm2 design)

Global Foundries 130 nm BiCMOS SiGe 8HP

Product Page

  • 1.2/2.5V CMOS supply
  • 1P8M process
  • High-performance FETs
  • ft/fmax 200/265GHz
  • Twin well CMOS technology
  • MIM/Dual MIM Capacitors
  • Series/Parallel spirals Inductors
  • µm/mm wave passive components
  • Thin/Thick dual gate oxide

130HPSIGE-8HP V1.8_4.0

Contact fab@cmc.ca.

GF 90nm CMOS-photonics 9WG

Product Page

  • SOI substrate
  • Far-BEOL V-groove for fibre attach
  • 1P7M
  • LVT

Contact fab@cmc.ca.

III-V Epitaxy on GaAs Substrates, InP and Ge Substrates

Product Page

The cost is highly structural dependent. Please contact zhang@cmc.ca.

MEMSCAP PiezoMUMPs

Product Page

  • SOI MEMS
  • 25um structure layer
  • piezoelectric metal

$1,420
(per 5 x 5 mm2 design) 

$550
(per 5 x 5 mm2 design) 

MEMSCAP PolyMUMPs Multi-User MEMS Process Technology

Product Page

  • Surface MEMS
  • Three structure layers

$1,420
(per 5 x 5 mm2 design) 

$550
(per 5 x 5 mm2 design) 

MEMSCAP Post-Processing for PolyMUMPs

Product Page

$860/design

$325/per design

Teledyne DALSA MIDIS Platform

Product Page

Teledyne DALSA MIDIS Design Kits

$9,800
(per 4 x 4 mm2 design) 

$3,400
(per 4 x 4 mm2 design) 

MicraGEM-Si™ MEMS Process

Product Page

Contact fab@cmc.ca.

Process NameFeaturesDesign KitCanadian AcademicCanadian Academic Peer ReviewedList

STM 28 nm CMOS FDSOI

ST Microelectronics logo

Product Page

  • 1.0/1.8V
  • 1P8M
  • no mimcap
  • LVT

$12,500/mm2
(Minimum charge is for a 1.25 mm2 design)

$5,000/mm2
(Minimum charge is for a 1.25 mm2 design)

TSMC 65 nm CMOS GP

Product Page

  • 1.0/2.5V
  • 1P9M
  • mim/momcap
  • LVT/native/HVT

$5,200/mm2
(Minimum charge is for a 1.1 x 1.1 mm2 design)

$2,350/mm2
(Minimum charge is for a 1.1 x 1.1 mm2 design.)

TSMC 65 nm CMOS LP

Product Page

  • 1.2/2.5V
  • 1P9M
  • mim/momcap
  • LVT/native/HVT

$5,200/mm2
(Minimum charge is for a 1.1 x 1.1 mm2 design)

$2,350/mm2
(Minimum charge is for a 1.1 x 1.1 mm2 design)

TSMC 0.13 μm CMOS

Product Page

  • 1.2/3.3V
  • 1P8M
  • mimcap

Design Kit: TSMC 0.13 µm CMOS

$2,050/mm2
(Minimum charge is for a 1.1 x 1.1 mm2 design)

$1,025/mm2
(Minimum charge is for a 1.1 x 1.1 mm2 design)

TSMC 0.18 μm CMOS


Product Page

  • 1.8/3.3V
  • 1P6M
  • mimcap
  • LVT/native/HVT

$1,100/mm2
(Minimum charge is for a 1.1 x 1.1 mm2 design)

$425/mm2
(Minimum charge is for a 1.1 x 1.1 mm2 design)

TSMC 0.35 μm CMOS

Product Page

  • 3.3/5V
  • 2P4M

$475/mm2
(Minimum charge is for a 1.1 x 1.1 mm2 design)

$250/mm2
(Minimum charge is for a 1.1 x 1.1 mm2 design)

AMS 0.35 μm CMOS – Basic

Product Page

  • 3.3/5V
  • 2P4M

$1,200/mm2

$600/mm2

AMS 0.35 μm CMOS – Opto

Product Page

  • 3.3/5V
  • 2P4M
  • anti-reflective coating

$1,200/mm2

$600/mm2

AMS 0.35 μm CMOS – High Voltage

Product Page

  • 3.3/5/50V
  • 2P4MH35B4D3kit includes:
    • standard cell
    • IO
    • bondpad

 

$1,320/mm2

$600/mm2

Global Foundries 130 nm BiCMOS SiGe 8HP

Product Page

  • 1.2/2.5V CMOS supply
  • 1P8M process
  • High-performance FETs
  • ft/fmax 200/265GHz
  • Twin well CMOS technology
  • MIM/Dual MIM Capacitors
  • Series/Parallel spirals Inductors
  • µm/mm wave passive components
  • Thin/Thick dual gate oxide

130HPSIGE-8HP V1.8_4.0

Contact fab@cmc.ca.

Process NameFeaturesDesign KitCanadian AcademicCanadian Academic Peer ReviewedList

Silicon Photonics General-Purpose

Product Page

  • SOI, 220 nm top Si, 2000 nm BOX
  • 193 nm lithography for waveguides
  • 6 implants for optical modulators
  • Ge deposition & implanting for photodetectors
  • Two metal levels for routing plus metal heater

$14,000
(Per 3 x 8 mm2 design)

$4,300
(Per 3 x 8 mm2 design)

GF 90nm CMOS-photonics 9WG

Product Page

  • SOI substrate
  • Far-BEOL V-groove for fibre attach
  • 1P7M
  • LVT

Contact fab@cmc.ca.

III-V Epitaxy on GaAs Substrates, InP and Ge Substrates

Product Page

The cost is highly structural dependent. Please contact zhang@cmc.ca.

Process NameFeaturesDesign KitCanadian AcademicCanadian Academic Peer ReviewedList

MEMSCAP PiezoMUMPs

Product Page

  • SOI MEMS
  • 25um structure layer
  • piezoelectric metal

$1,420
(per 5 x 5 mm2 design) 

$550
(per 5 x 5 mm2 design) 

MEMSCAP PolyMUMPs Multi-User MEMS Process Technology

Product Page

  • Surface MEMS
  • Three structure layers

$1,420
(per 5 x 5 mm2 design) 

$550
(per 5 x 5 mm2 design) 

MEMSCAP Post-Processing for PolyMUMPs

Product Page

$860/design

$325/per design

Teledyne DALSA MIDIS Platform

Product Page

Teledyne DALSA MIDIS Design Kits

$9,800
(per 4 x 4 mm2 design) 

$3,400
(per 4 x 4 mm2 design) 

MicraGEM-Si™ MEMS Process

Product Page

Contact fab@cmc.ca.

Process NameFeaturesDesign KitCanadian AcademicCanadian Academic Peer ReviewedList

Open-Gate Silicon JFET

Product Page

  • JFET with no top gate, enabling user-deposition of sensor material
  • 4-mask process on epitaxial Si with 5 µm feature size
  • Front- and back-side Boron ion implantation
  • One metal routing layer
  • Gold pad metallization (compatible with wirebonding)
  • SiN passivation
  • Aluminum bottom gate

Design Kit: Open-Gate Silicon JFET (OG Si-JFET) in L-Edit and Synopsys Sentaurus

Contact fab@cmc.ca.

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