Applied Nanotools (ANT) Silicon Nitride (SiN) Fabrication Process


  • Silicon nitride with device layer thickness 400 nm and buffer oxide Layer thickness 4.5 µm
  • 100 keV electron-beam lithography system enabling features down to 120 nm
  • Fully etched devices (etched down to the buffer oxide) are created using an e-beam mask material and anisotropic ICP-RIE etching process.
  • Tri-layer TiW/Al metallization and TiW alloy heater are available
  • Metal oxide window, deep trench for edge coupling and SEM imaging options are available.
  • Supports design and fabrication of a range of components and systems consisting of:
    • waveguides (strip)
    • gratings for fibre coupling
    • deep trench and nano-tapers for edge coupling
    • multiplexers (diffraction or arrayed waveguide) and filters (resonators, Bragg gratings)


  • SiN, 400 nm on 4.5 µm oxide box layer
  • 100 keV electron-beam lithography for waveguides
  • One metal level for routing plus metal heater

Design Kits and Libraries


List Price
Price for Subscribers
Note: List pricing does not include Engineering Support – contact fab@cmc.ca for a quote.

Note: Discounted pricing is available to academics in Canada with a CMC Subscription. You must sign in to see it.


Contact licensing@cmc.ca.

For Canadian Academics

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