CMC provides access to Optiwave’s tools through the VIE program. The OptiSuite toolset includes: OptiSystem – a comprehensive software design suite that enables users to plan, test, and simulate optical links in the transmission layer of modern optical networks. OptiInstrument – addresses the needs for working with instruments. OptiSPICE – is used to analyze integrated […]
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AMF High-Performance technology was engineered to tackle the high-speed, ultra-low-loss demands of next-generation applications. The improved material properties and proven production stabilities deliver unmatched performance for applications demanding higher bandwidth and lower latency. Process Modules Silicon-on-insulator, 220-nm top Si film, 3000-nm buried oxide (BOX) High resistivity handle wafer (>750 ohm-cm) 193-nm deep UV lithography for
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Luceda software (IPKISS) allows for a full photonic design flow centred around schematic development and code-driven development with the following features: Component/circuit design and simulation Schematic-driven design PDK/library development tools Regression testing, DRC, and LVS for verification (functional and physical) Advanced circuit simulation for variability studies, DfM (design for manufacture), and yield analysis More information
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Across Canada, CMC Microsystems supports startups through our Virtual Incubator Environment (VIE). Your company can benefit from the CAD software we provide, and we offer access to fabrication or training for these tools. What You Get A single copy of the following software: Virtuoso Schematic Editor Spectre Classic Simulator Virtuoso ADE Explorer Virtuoso Layout Suite
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This process allows for fabrication of coplanar structures on a high-resistivity silicon substrate, like resonators with quality factors of about one million. Aluminum junctions patterned by electron beam lithography can be added on top to make complete qubits CMC offers this process as part of a multi-project wafer (MPW) service. Al-ALOx-Al junctions in a range
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This two-layer process allows for the fabrication of Niobium side-wall passivated junctions via an Nb-Al-AlOx-Nb tri-layer, alongside an Nb wiring layer on top. CMC offers this process as part of a multi-project wafer (MPW) service. Nb-Al-ALOx-Nb trilayer junctions High-resistivity silicon substrate Nb wiring layer on top The process provides 20 copies of the designs. Applications
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Silicon nitride with device layer thickness 400 nm and buffer oxide Layer thickness 4.5 µm 100 keV electron-beam lithography system enabling features down to 120 nm Fully etched devices (etched down to the buffer oxide) are created using an e-beam mask material and anisotropic ICP-RIE etching process. Tri-layer TiW/Al metallization and TiW alloy heater are available
Applied Nanotools (ANT) Silicon Nitride (SiN) Fabrication Process Read More »
Silicon-on-insulator, 220-nm top Si film, 2000-nm buried oxide (BOX) 100 keV electron-beam lithography system enabling features down to 60 nm One full etch of the top silicon for standard MPW run, partial silicon etching will be available in near future Tri-layer TiW/Al metallization and TiW alloy heater are available Metal oxide window, deep trench for
Applied Nanotools (ANT) NanoSOI Fabrication Process Read More »
MEMS Pro is now included in the Siemens HEP. SoftMEMs MEMS Pro is a flexible, powerful, and easy-to-use CAD tool suite for the design and analysis of micro-electro-mechanical systems (MEMS). It offers an integrated solution for the design process that shortens development time while providing designers with reliable analysis for manufacture. MEMS Pro, in combination
The Siemens Custom IC tools consist of integrated front-end and back-end tools, from circuit simulation and waveform probing to physical layout and simulation. This bundle was formerly called “Tanner EDA”.Modules included in Siemens Custom IC tools are: L-Edit—versions for MEMS and photonics layout design and DRC; for more details, see L-Edit MEMS and L-Edit Photonics.
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CMC Microsystems offers access to the GlobalFoundries® (GF) 22FDX™ 22 nm Fully-Depleted Silicon-on-Insulator (FD-SOI) process technology platform for low power embedded applications. The 22 nm FD-SOI transistor technology delivers FinFET-like performance with energy-efficiency. The simultaneous high Ft /high Fmax, high self-gain and high current efficiency of 22FDX enables ultra low power analog/RF/mmWave designs. For more information,
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CMC Microsystems offers access to the GlobalFoundries® (GF) 130 nm high-performance SiGe BiCMOS technology. This technology is well suited for the design of high-speed, low-noise mixed-signal systems. The silicon-proven solutions enable you to maximize performance, integrate extensive digital and RF functionality and exploit an economical silicon platform. An advanced copper metallization feature enables higher current
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CMC Microsystems offers access to the GlobalFoundries® (GF) 90 nm High-performance SiGe BiCMOS technology. The GF 90 nm high-performance BiCMOS technology is well suited for the design of high-speed logic/mixed-signal systems. The process is configured for 1.2 V/1.8 V/2.5 V/3.3 V high-performance operation at RF frequencies. The technology offers low noise figure, high gain and
GlobalFoundries® 90 nm BiCMOS SiGe 9HP Read More »
Features and Benefits1 Cloud access for your existing Cadence licenses 2 or licenses available to eligible startups on the VIE program Delivery via CMC cloud design environment, a protected environment that transforms your laptop into a secure, high-performance design lab 3 Fully configured, installed, and hosted by CMC with continuous software updates to reduce administration costs
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Piezo MEMS is a piezoelectric-based MEMS process for ME, ECE and biomedical researchers to develop sensors, energy harvesters, ultrasonic transducers, microphones, and self-contained microsystems for automotive, aerospace, healthcare and entertainment electronics markets. Note: The expected number of chips to be delivered for this technology is 15.
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CMC’s multi-project wafer service delivers the MEMS technology, through a partnership with Science Foundry. The Poly MEMS technology is a triple polysilicon, single metal surface micromachining process with deposited oxide (PSG) as the sacrificial material, and silicon nitride for electrical isolation from the substrate. CMC also offers optional HF release and supercritical carbon dioxide drying.
Science Foundry Poly MEMS Multi-User MEMS Process Technology Read More »
Silicon-on-insulator, 220-nm top Si film, 3000-nm buried oxide (BOX) High resistivity handle wafer (>750 ohm-cm) 193-nm deep UV lithography for waveguides, enabling features down to approximately 140 nm Two partial etches and one full etch of the top silicon PECVD Silicon Nitride waveguide integration 6 implants for optical modulators (P++, P+, P, N++, N+, N) Germanium
AMF Silicon Photonics General-Purpose Fabrication Process Read More »
This 0.35 µm CMOS technology offers four metal layers, digital standard cells, an anti-reflective coating and high-efficiency photodiodes, and bulk micromachining. CMC’s multi-project wafer service delivers this technology from austriamicrosystems, offering three processes: Basic, Opto and High-Voltage (see details below). The technology is suitable for: High-Voltage Process (H35B4D3) Details Technology Features: 4 metal and 2 poly layers with a
AMS 0.35 µm CMOS Process Technology (High-Voltage) Read More »
This 0.35 μm CMOS technology offers four metal layers, digital standard cells, an anti-reflective coating and high-efficiency photodiodes, and bulk micromachining. CMC’s multi-project wafer service delivers this technology from austriamicrosystems, offering three processes: Basic, Opto (see details below) and High-Voltage. Opto Process (C35B4O1) Details Technology Features: 4 metal and 2 poly layers (similar to basic option) High-efficiency
AMS 0.35 µm CMOS Process Technology (Opto) Read More »
This 0.35 μm CMOS technology offers four metal layers, digital standard cells, an anti-reflective coating and high-efficiency photodiodes, and bulk micromachining. CMC’s multi-project wafer service delivers this technology from austriamicrosystems, offering three processes: Basic (see details below), Opto and High-Voltage. Basic Process (C35B4C3) Details Technology Features: 4 metal and 2 poly layers Supply Voltage: 3.3/5V Bulk-micromachining option, allowing
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The dw-2000™ Physical Layout and Verification Software, from Design Workshop Technologies Inc., enables the physical layout and verification of optical components built using planar waveguide technology and other semiconductor manufacturing techniques, such as microwave designs. dw-2000 has many benefits for photonic layout applications while avoiding the pitfalls associated with the use of a general-purpose drawing tool.
Design Workshop dw-2000 Photonic Design Software Read More »
For infertile couples, the expense, duration and low success rates of assisted reproduction can make the process a physical and emotional ordeal.
Channeling new approaches to assisted reproduction Read More »
