CMC offers access to the TSMC 28 nm high-performance CMOS logic technology. This technology is well suited for the design of high-performance computing and RF systems. The technology offers advantages of high speed, low power consumption and lower leakage current.
To access this technology, please contact [email protected].
The process flavor supported by CMC is High K Metal gate (HKMG) technology configured for 0.9Â V (Core)/1.8Â V (I/O) operation. This technology is suitable for:
- High-speed digital circuits
- Low-power circuits
- RF/mixed-signal designs
Constraints
- Required die Y dimension (mm) including seal ring: 1, 2, 3, etc., must be in integer format.
Note: The Y dimension has a 10% shrinkage. To meet the Y dimension requirement, the designed Y should be 1.111, 2.222, 3.333, and so forth. When measuring the area, the shrunk size will be considered. - Required die X dimension including seal ring: minimum 0.6 mm
- minimum area: 1 mm2
- aspect ration <= 3
- MiM cap: N/A
Applications
Potential applications include:
- Processor design
- Consumer electronics
- IoT
