TSMC 65 nm LP CMOS Process Technology


CMC offers access to the TSMC 65nm LP CMOS technology. Access is limited to account holders who are approved by TSMC. To access this technology, please contact licensing@cmc.ca.

CMC is offering access to this 65nm LP CMOS through TSMC’s shuttle service. The process flavour supported by CMC is:

  • Mixed-signal/RF 1P9M process configured for 1.2/2.5V and ultra-thick (34kA) top metal options which is suitable for:
    • Low power circuits
    • RF/mixed-signal designs
    • High-speed digital circuits
  • Potential applications include:
    • RF, microwave systems
    • Optical communication systems

Note: The expected number of chips to be delivered for this technology is 100.


  • 1.2 V/2.5 V
  • 1P9M
  • mim/momcap
  • LVT/native/HVT

Design Kits and Libraries

  • Design Library: TSMC 65 nm GP Bond Pad Library – tpbn65v
  • Design Kit: TSMC 65 nm CMOS GP – CRN65LP
  • Design Library: TSMC 65 nm LP Standard Cell Libraries – tcbn65lp
  • Design Library: TSMC 65 nm LP IO Digital Libraries – tpdn65lpnv2
  • Design Library: TSMC 65nm LP IO Analog Libraries – tpan65lpnv2


Subscribers (Academics in Canada)
Subscribers (Academics in Canada, Peer Reviewed)
Academics outside of Canada or Industry



Contact CMC. Contact fab@cmc.ca for MPW access, or sales@cmc.ca for a dedicated run.


Minimum Subscription Required: Research

Does your research benefit from products and services provided by CMC Microsystems?

SponsorChip helps companies enhance their research efforts and links to academic researchers.

Scroll to Top
Skip to content