CMC Microsystems, the CMC Microsystems logo, CMC Basecamp, CMC SponsorChip, CADpass, Canada’s National Design Network and Réseau National de Conception du Canada are trademarks or registered trademarks of Canadian Microelectronics Corporation / Société canadienne de micro-électronique operating as CMC Microsystems.
Packaging and MEMS fabrication options (with guest presentation from IEEE EPS)
Event Details
Join CMC as Andrew Fung and Priyadarshini Mangannavar discuss MEMS fabrication options and the new prototyping and packaging discounts.
Andrew Fung is product management professional who enjoys multi-disciplinary technology development that combines business modelling with user focus. As a Technical Team Lead at CMC Microsystems, he drives technology strategy and product development for a growing portfolio of MEMS processes, emerging nanofabrication technology, and heterogeneous integration. Andrew holds a PhD in Biomedical Engineering from the University of California Los Angeles and a BASc in Electrical Engineering from University of Waterloo.
Priyadarshini Mangannavar has over 7 years experience in the semiconductor industry. During her Master’s at IIT Madras, she has worked on fabrication of novel metal oxide thin film transistors (TFTs) for use in transparent display applications. She was also involved with device bring up of new technology nodes and qualification of 2D/3D NAND flash memories at SanDisk, A Western Digital Brand. Now as a Technology Advisor at CMC Microsystems, she helps connect Canadian researchers to world’s best design tools, manufacturing technologies, and engineering support.
Guest presentation: Mohsen Asad, IEEE Electronic Packaging Society
Mohsen Asad (Student Member, IEEE) received a Ph.D. in electrical engineering from the University of Waterloo, Waterloo, ON, Canada, in 2020. As a Ph.D. student, he was honourably awarded the Faculty of Engineering (FOE) award and the Waterloo Institute of Nanotechnology (WIN) fellowship. During his Ph.D., he developed packaging technologies for integrating active and passive III-V semiconductor devices on heterogeneous substrates. Focused on reliability and high-throughput, his patented low-temperature integration technologies will be used by display manufactures to realize high-resolution and flexible micro-LED displays. He recently joined Ranovus Inc. to use his packaging expertise to develop a highly scalable co-package of electronics and optics for the next-generation 800 GB optical interconnect solutions.
To make a community, share the knowledge and enrich the members, Mohsen and his colleagues at the University of Waterloo decided to organize the first IEEE Electronic Packaging Society (EPS) student chapter in Canada. This chapter is actively focused on disseminating the knowledge of electronic packaging, make a bridge between academy and industry, and preparing the future of brilliant packaging engineers.
Advance your research projects! CFI investments made in 2020 in national research facilities including Canada’s National Design Network have enabled access to a much wider variety of microelectronics, photonics, and MEMS fabrication technologies from several foundries (including GF) at new, affordable prices. Learn more and reserve space in manufacturing runs for your projects. New pricing will be available until at least March 2023.