FAB

TSMC 65-nanometer LP CMOS Process Technology

Description

CMC offers access to the TSMC 65nm LP CMOS technology. Access is limited to account holders who are approved by TSMC. To access this technology, please contact licensing@cmc.ca.

CMC is offering access to this 65nm LP CMOS through TSMC’s shuttle service. The process flavour supported by CMC is:

  • Mixed-signal/RF 1P9M process configured for 1.2/2.5V and ultra-thick (34kA) top metal options which is suitable for:
    • Low power circuits
    • RF/mixed-signal designs
    • High-speed digital circuits
  • Potential applications include:
    • RF, microwave systems
    • Optical communication systems
Note: The expected number of chips to be delivered for this technology is 100.

Features

  • 1.2/2.5V
  • 1P9M
  • mim/momcap
  • LVT/native/HVT

Kits

CRN65LP

Libraries:

  • standard cell
  • IO
  • bondpad

Additional Libraries

Pricing

$6,100/mm2

(Minimum charge is for a 1.1 x 1.1 mm2 design)

$6,100/mm2

(Minimum charge is for a 1.1 x 1.1 mm2 design)

$2000/mm2

(Minimum charge is for a 1.1 x 1.1 mm2 design)

$2000/mm2

(Minimum charge is for a 1.1 x 1.1 mm2 design)

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