This 0.35 µm CMOS technology offers four metal layers, digital standard cells, an anti-reflective coating and high-efficiency photodiodes, and bulk micromachining.
High-Voltage Process (H35B4D3) Details
- Technology Features: 4 metal and 2 poly layers with a thick metal4 layer
- Supply Voltage: 50 V/5 V/3.3 V allowing 20 V at the gate
- For more details see:
Note: The expected number of chips to be delivered for this technology is 25.
The technology is suitable for:
- Embedded photodiodes, high-density CMOS imaging and optoelectronic detection
- High-voltage operation (maximum 20V gate, 50V operating voltage)
- Mixed-signal designs
- High-speed digital circuits
- For the Basic and Opto processes, bulk micromachining of MEMS structures
Potential applications include:
- Biomedical imaging
- Automotive and environmental sensors